Algebraic topological methods for the synthesis of switching systems. I

Author:
J. Paul Roth

Journal:
Trans. Amer. Math. Soc. **88** (1958), 301-326

MSC:
Primary 93.00; Secondary 06.00

DOI:
https://doi.org/10.1090/S0002-9947-1958-0097285-0

MathSciNet review:
0097285

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References | Similar Articles | Additional Information

**[A]***Synthesis of Electronic Computing and Control Circuits*, Harvard University Press, Cambridge, Mass., 1951. By the Staff of the Computation Laboratory. MR**0044916****[C]**S. H. Caldwell,*Discussion of Karnaugh's paper*, AIEE vol. 72 Part I (1953) pp. 598-599.**[E-Z]**Samuel Eilenberg and J. A. Zilber,*Semi-simplicial complexes and singular homology*, Ann. of Math. (2)**51**(1950), 499–513. MR**35434**, https://doi.org/10.2307/1969364**[G]**H. H. Goldstine,*On the relation between machine developments and numerical analysis*, paper presented at Bonn Colloquium, October 20-22, 1955.**[H]**D. A. Huffman,*The synthesis of sequential switching circuits. I, II*, J. Franklin Inst.**257**(1954), 161–190, 275–303. MR**62648**, https://doi.org/10.1016/0016-0032(54)90574-8**[J]**G. T. Jacobi, unpublished paper.**[K]**M. Karnaugh,*The map method for synthesis of combinational logic circuits*, Commun. and Electronics**1953**(1953), 593–599. MR**0069032****[K-R-W]**W. Keister, A. E. Ritchie and S. H. Washburn,*The design of switching circuits*, Chapter 5, New York, D. Van Nostrand Co., 1951.**[M-P]**Warren S. McCulloch and Walter Pitts,*A logical calculus of the ideas immanent in nervous activity*, Bull. Math. Biophys.**5**(1943), 115–133. MR**0010388**, https://doi.org/10.1007/bf02478259**[M]**G. A. Montgomerie,*Sketch for an algebra of relay and contactor circuits*, J. IEE vol. 95, Part III (1948) pp. 303-312.**[M,E]**E. F. Moore,*A table of four-relay two-terminal contact networks*--*case*22108, Bell Telephone Laboratory Technical Memo. MM-52-180-45.**[N-H ]**A. Nakasima and M. Hanzawa,*The theory of the equivalent transformation of simple partial paths in relay circuits*. J. Inst. Elec. Comm. Engrs. Japan, 1936-1938.**[N]**Raymond J. Nelson,*Review of Quine's paper*, J. Symbolic Logic vol. 18 (1953) pp. 280-283.**[N1]**Raymond J. Nelson,*Simplest normal truth functions*, J. Symbolic Logic**20**(1955), 105–108. MR**72073**, https://doi.org/10.2307/2266893**[N,R]**R. Z. Norman, unpublished paper.**[QO]**W. V. Quine,*Methods of logic*, New York, 1950.**[Q]**W. V. Quine,*The problem of simplifying truth functions*, Amer. Math. Monthly**59**(1952), 521–531. MR**51191**, https://doi.org/10.2307/2308219**[Q1]**W. V. Quine,*A way to simplify truth functions*, Amer. Math. Monthly**62**(1955), 627–631. MR**75886**, https://doi.org/10.2307/2307285**[R1]**J. P. Roth,*A combinatorial topological method for the synthesis of switching systems in**variables*, Bull. Amer. Math. Soc. Abstract 62-2-281.**[R2]**-,*An algorithm for the problem of Quine*, Bull. Amer. Math. Abstract 62-3-367.**[R3]**-,*A function-space formulation of the switching circuit synthesis problem*, Bull. Amer. Math. Soc. Abstract 62-3-392.**[R4]**-,*Algebraic topological methods for the synthesis of switching systems in**variables*, The Institute for Advanced Study, Princeton, ECP 56-02, April 1956.**[S]**C. E. Shannon,*A symbolic analysis of relay and switching circuits*, Trans. AIEE vol. 57 (1938) pp. 713-723.**[S1]**Claude E. Shannon,*The synthesis of two-terminal switching circuits*, Bell System Tech. J.**28**(1949), 59–98. MR**29860**, https://doi.org/10.1002/j.1538-7305.1949.tb03624.x**[V]**E. W. Veitch,*A chart method for simplifying truth functions*, Proceedings of the Association for Computing Machinery, Richard Rimbach Associates, Pittsburgh, 1952, pp. 127-133.

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DOI:
https://doi.org/10.1090/S0002-9947-1958-0097285-0

Article copyright:
© Copyright 1958
American Mathematical Society